1. Field of the Invention
The present invention relates to a semiconductor device with a structure that insulating films are buried in element isolation trenches formed in a semiconductor substrate and having different opening widths and a method of manufacturing the same.
2. Description of the Related Art
In semiconductor devices constituting integrated circuits, refinement has progressed for the purpose of improving integration. The refinement includes reduction in an element isolation region as one of elements thereof. A shallow trench isolation (STI) technique has recently been introduced and realized element isolation by the employment of trenches with smaller widths. However, when an insulating film is insufficiently buried in a trench formed in a semiconductor substrate, insulation properties of the substrate would be adversely affected.
In view of the aforesaid problem, use of a coating type oxide film has conventionally been proposed. Japanese Patent No. 3178412 discloses one of the coating type oxide films. The coating type oxide film includes solutions such as a solution of silazane perhydride polymer (see Japanese Patent No. 3,178,412 and U.S. Pat. No. 6,191,002). The solution is spin-coated and heat-treated so as to be buried as an oxide film in a trench.
Element isolation regions are formed in both memory cell regions and peripheral circuit regions by an STI process in nonvolatile semiconductor devices respectively. In this case, after formation of the trench, a silicon oxide film is formed by a film forming method such as high density plasma (HDP) process so as to be buried in the trench. However, with progress of refinement of elements, void easily tends to occur in a narrow part of a region in which the silicon oxide film is buried.
The following countermeasure has been proposed to prevent occurrence of void. In burying the silicon oxide film in a trench, forming of the silicon oxide film is stopped before an upper opening of void occurring in a mid stage of the burying is closed by further execution of the burying. A polysilazane liquid is spin-coated so as to fill the void through the upper opening. A thermal treatment can be carried out after spin coating so that the polysilazane liquid is changed into a silicon oxide film.
It is desirable that the aforesaid thermal treatment should be carried out at a high temperature in an oxidizing atmosphere. However, a high-temperature treatment progresses oxidation in an edge of the silicon oxide film forming a gate insulating film, and a polycrystalline silicon film constituting the gate electrode is also oxidized. As a result, actually, a temperature for thermal treatment in the oxidizing atmosphere needs to be reduced for suppression of oxidation and thereafter, a high-temperature thermal treatment needs to be carried out in an inert atmosphere.
Then, the thermal treatment in the oxidizing atmosphere becomes insufficient such that impurities contained in the polysilazane liquid are diffused near to a silicon interface, whereupon a fixed charge results from the impurities. Consequently, an increased fixed charge adversely affects characteristics of the transistor in the peripheral circuit region where a larger amount of applying polysilazane liquid is deposited in the STI. For example, a Vg-Id characteristic of the peripheral transistor shows that the transistor is not reliably turned off even when a gate voltage drops to zero.